gpllib: Updating dmi code

This is a simple rebase of the current code against current dmidecode
version. This is pretty lame copy/paste but as we don't have a
libification of dmidecode, that does the job.

This patch does improve mostly the cpu & ram reporting.

6 files changed, 67 insertions, 30 deletions

diff --git a/com32/gpllib/dmi/dmi.c b/com32/gpllib/dmi/dmi.c
index 5a25b413..7613383f 100644
--- a/com32/gpllib/dmi/dmi.c
+++ b/com32/gpllib/dmi/dmi.c
@@ -231,7 +231,7 @@ void dmi_bios_characteristics_x2(uint8_t code, s_dmi * dmi)
 {
     int i;
 
-    for (i = 0; i <= 2; i++)
+    for (i = 0; i <= 4; i++)
 	if (code & (1 << i))
 	    ((bool *) (&dmi->bios.characteristics_x2))[i] = true;
 }
diff --git a/com32/gpllib/dmi/dmi_bios.c b/com32/gpllib/dmi/dmi_bios.c
index 4a74800e..b21caf99 100644
--- a/com32/gpllib/dmi/dmi_bios.c
+++ b/com32/gpllib/dmi/dmi_bios.c
@@ -75,5 +75,7 @@ const char *bios_charac_x1_strings[] = {
 const char *bios_charac_x2_strings[] = {
     "BIOS boot specification is supported",	/* 0 */
     "Function key-initiated network boot is supported",
-    "Targeted content distribution is supported"	/* 2 */
+    "Targeted content distribution is supported",
+    "UEFI is supported",
+    "System is a virtual machine" /* 4 */
 };
diff --git a/com32/gpllib/dmi/dmi_cache.c b/com32/gpllib/dmi/dmi_cache.c
index 67a43d0b..b52eba19 100644
--- a/com32/gpllib/dmi/dmi_cache.c
+++ b/com32/gpllib/dmi/dmi_cache.c
@@ -130,10 +130,11 @@ const char *dmi_cache_associativity(uint8_t code)
 	"24-way Set-associative",
 	"32-way Set-associative",
 	"48-way Set-associative",
-	"64-way Set-associative"	/* 0x0D */
+	"64-way Set-associative",
+	"20-way Set-associative" /* 0x0E */
     };
 
-    if (code >= 0x01 && code <= 0x0D)
+    if (code >= 0x01 && code <= 0x0E)
 	return type[code - 0x01];
     return out_of_spec;
 }
diff --git a/com32/gpllib/dmi/dmi_chassis.c b/com32/gpllib/dmi/dmi_chassis.c
index afca5c26..020c163a 100644
--- a/com32/gpllib/dmi/dmi_chassis.c
+++ b/com32/gpllib/dmi/dmi_chassis.c
@@ -57,14 +57,17 @@ const char *dmi_chassis_type(uint8_t code)
 	"RAID Chassis",
 	"Rack Mount Chassis",
 	"Sealed-case PC",
-	"Multi-system",		/* 0x19 */
+	"Multi-system",
 	"CompactPCI",
 	"AdvancedTCA",
 	"Blade",
-	"Blade Enclosing" /* 0x1D */
+	"Blade Enclosing",
+	"Tablet",
+	"Convertible",
+	"Detachable" /* 0x20 */
     };
 
-    if (code >= 0x01 && code <= 0x1D)
+    if (code >= 0x01 && code <= 0x20)
 	return type[code - 0x01];
     return out_of_spec;
 }
diff --git a/com32/gpllib/dmi/dmi_memory.c b/com32/gpllib/dmi/dmi_memory.c
index 36937539..0647b8fe 100644
--- a/com32/gpllib/dmi/dmi_memory.c
+++ b/com32/gpllib/dmi/dmi_memory.c
@@ -124,15 +124,20 @@ const char *dmi_memory_device_type(uint8_t code)
 	"RDRAM",
 	"DDR",
 	"DDR2",
-	"DDR2 FB-DIMM",		/* 0x14 */
-	NULL,
-	NULL,
-	NULL,
-	"DDR3",			/* 0x18 */
-	"FBD2"			/* 0x19 */
+	"DDR2 FB-DIMM",
+	"Reserved",
+	"Reserved",
+	"Reserved",
+	"DDR3",
+	"FBD2",
+	"DDR4",
+	"LPDDR",
+	"LPDDR2",
+	"LPDDR3",
+	"LPDDR4" /* 0x1E */
     };
 
-    if (code >= 0x01 && code <= 0x19)
+    if (code >= 0x01 && code <= 0x1E)
 	return type[code - 0x01];
     return out_of_spec;
 }
@@ -152,7 +157,10 @@ void dmi_memory_device_type_detail(uint16_t code, char *type_detail, int sizeof_
 	"EDO",
 	"Window DRAM",
 	"Cache DRAM",
-	"Non-Volatile"		/* 12 */
+	"Non-Volatile",
+	"Registered (Buffered)",
+	"Unbuffered (Unregistered)",
+	"LRDIMM"  /* 15 */
     };
 
     if ((code & 0x1FFE) == 0)
@@ -160,7 +168,7 @@ void dmi_memory_device_type_detail(uint16_t code, char *type_detail, int sizeof_
     else {
 	int i;
 
-	for (i = 1; i <= 12; i++)
+	for (i = 1; i <= 15; i++)
 	    if (code & (1 << i))
 		snprintf(type_detail, sizeof_type_detail, "%s", detail[i - 1]);
     }
diff --git a/com32/gpllib/dmi/dmi_processor.c b/com32/gpllib/dmi/dmi_processor.c
index fe2ef63a..a23e7fe3 100644
--- a/com32/gpllib/dmi/dmi_processor.c
+++ b/com32/gpllib/dmi/dmi_processor.c
@@ -256,8 +256,8 @@ const char *dmi_processor_family(uint8_t code, char *manufacturer)
 	"G5",
 	"ESA/390 G6",		/* 0xCB */
 	"z/Architectur",
-	NULL,
-	NULL,
+	"Core i5",
+	"Core i3",
 	NULL,
 	NULL,			/*0xD0 */
 	NULL,
@@ -268,29 +268,29 @@ const char *dmi_processor_family(uint8_t code, char *manufacturer)
 	"Multi-Core Xeon",			/*0xD6 */
 	"Dual-Core Xeon 3xxx",
 	"Quad-Core Xeon 3xxx",  /*0xD8 */
-	NULL,
+	"Nano",
 	"Dual-Core Xeon 5xxx", /*0xDA */
 	"Quad-Core Xeon 5xxx",
 	NULL,
 	"Dual-Core Xeon 7xxx", /*0xDD */
 	"Quad-Core Xeon 7xxx",
 	"Multi-Core Xeon 7xxx",
-	NULL,			/*0xE0 */
-	NULL,
-	NULL,
+	"Multi-Core Xeon 3400",	/*0xE0 */
 	NULL,
 	NULL,
 	NULL,
+	"Opteron 3000",
+	"Sempron II",
 	"Embedded Opteron Quad-Core",	/* 0xE6 */
 	"Phenom Triple-Core",
 	"Turion Ultra Dual-Core Mobile",
 	"Turion Dual-Core Mobile",
 	"Athlon Dual-Core",
 	"Sempron SI",		/*0xEB */
-	NULL,
-	NULL,
-	NULL,
-	NULL,
+	"Phenom II",
+	"Athlon II",
+	"Six-Core Opteron",
+	"Sempron M",
 	NULL,
 	NULL,
 	NULL,
@@ -367,17 +367,40 @@ const char *dmi_processor_upgrade(uint8_t code)
 	"Socket 478",
 	"Socket 754",
 	"Socket 940",
-	"Socket 939"		/* 0x12 */
+	"Socket 939",
 	"Socket mPGA604",
 	"Socket LGA771",
 	"Socket LGA775",
 	"Socket S1",
 	"Socket AM2",
-	"Socket F (1207)"
-	"Socket LGA1366"	/* 0x19 */
+	"Socket F (1207)",
+	"Socket LGA1366",
+	"Socket G34",
+	"Socket AM3",
+	"Socket C32",
+	"Socket LGA1156",
+	"Socket LGA1567",
+	"Socket PGA988A",
+	"Socket BGA1288",
+	"Socket rPGA988B",
+	"Socket BGA1023",
+	"Socket BGA1224",
+	"Socket BGA1155",
+	"Socket LGA1356",
+	"Socket LGA2011",
+	"Socket FS1",
+	"Socket FS2",
+	"Socket FM1",
+	"Socket FM2",
+	"Socket LGA2011-3",
+	"Socket LGA1356-3",
+	"Socket LGA1150",
+	"Socket BGA1168",
+	"Socket BGA1234",
+	"Socket BGA1364" /* 0x30 */
     };
 
-    if (code >= 0x01 && code <= 0x19)
+    if (code >= 0x01 && code <= 0x30)
 	return upgrade[code - 0x01];
     return out_of_spec;
 }